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Lars Kuhtz
I defended my Ph.D. thesis in December 2010. Currently, I am employed at Microsoft in Redmond, WA, USA. ResearchDuring the time as a Ph.D. student, my research was about the complexity of runtime verification of temporal logic properties. In runtime verification, we monitor the running system and check on-the-fly whether the desired properties hold. Unlike in static verification, where the verification algorithm is executed at design-time and can therefore afford to spend significant time and resources, runtime verification algorithms must run in synchrony with the monitored system and usually even share the resources of the implementation platform. Many questions concerning the complexity of runtime verification problems are still open. For instance until recently the best known upper bound for the evaluation of an LTL formula over a (finite) path was P while the best known lower bound is NC1. We were able to reduce this gap by proving that path checking for LTL is efficiently parallelizable. Runtime verification is often applied within an online monitoring setting where a possibly infinite input trace is read sequentially. A monitor for online runtime verification of LTL properties requires in the worst case a number of states that is doubly exponential in the size of the property. Fortunately, in practice the worst case often can be avoided. Namely, we provide a construction of monitor circuits for LTL with bounded and unbounded future where bounded sub-formulas do not provide to the exponential blow up. Formerly, I have been studying random graphs. We developed an algorithm for approximating the chromatic number of a random graph in expected polynomial time. Moreover, I built a tool for deductive verification of reactive systems and translation validation. Publications
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TeachingProjectsMy research was supported by the German Research Foundation (DFG) as part of the Transregional Collaborative Research Center Automatic Verification and Analysis of Complex Systems (SFB/TR 14 AVACS). The goal of the AVACS project is to raise the state of the art in automatic verification and analysis techniques from its current level, where it is applicable only to isolated facets (concurrency, time, continuous control, stability, dependability, mobility, data structures, hardware constraints, modularity, levels of refinement), to a level allowing the comprehensive verification of computer systems. |
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